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ade7757 * energy metering ic with integrated oscillator rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ? 2003 analog devices, inc. all rights reserved. features on-chip oscillator as clock source high accuracy, supposes 50 hz/60 hz iec 521/iec 61036 less than 0.1% error over a dynamic range of 500 to 1 the ade7757 supplies average real power on the frequency outputs f1 and f2 the high frequency output cf is intended for calibration and supplies instantaneous real power the logic output revp can be used to indicate a potential miswiring or negative power direct drive for electromechanical counters and 2-phase stepper motors (f1 and f2) proprietary adcs and dsp provide high accuracy over large variations in environmental conditions and time on-chip power supply monitoring on-chip creep protection (no load threshold) on-chip reference 2.5 v (20 ppm/ c typical) with external overdrive capability single 5 v supply, low power (20 mw typical) low cost cmos process ac input only functional block diagram multiplier revp v2p v2n v1p hpf rclkin ref in/out f1 f2 cf scf s0 s1 phase correction 4k ...110101... signal processing block power supply monitor - adc v1n ade7757 ...11011001... lpf 2.5v reference digital-to-frequency converter v dd agnd dgnd - adc internal oscillator general description the ade7757 is a high accuracy electrical energy measurement ic. it is a pin reduction version of the ade7755 with an enhance- ment of a precise oscillator circuit that serves as a clock source to the chip. the ade7757 eliminates the cost of an external crystal or resonator, thus reducing the overall cost of a meter * u.s. patents 5,745,323; 5,760,617; 5,862,069; 5,872,469; others pending. built with this ic. the chip directly interfaces with the shunt resistor and operates only with ac input. the ade7757 specifications surpass the accuracy requirements as quoted in the iec 61036 standard. the an-679 application note can be used as a basis for a description of an iec 61036 low cost w att-hour meter reference design. the only analog circuitry used in the ade7757 is in the - adcs and reference circuit. all other signal processing (e.g., multiplication and filtering) is carried out in the digital domain. this approach provides superior stability and accuracy over time and extreme environmental conditions. the ade7757 supplies average real power information on the low frequency outputs f1 and f2. these outputs may be used to directly drive an electromechanical counter or interface with an mcu. the high frequency cf logic output, ideal for calibra- tion purposes, provides instantaneous real power information. the ade7757 includes a power supply monitoring circuit on the v dd supply pin. the ade7757 will remain inactive until the supply voltage on v dd reaches approximately 4 v. if the supply falls below 4 v, the ade7757 will also remain inactive and the f1, f2, and cf outputs will be in their nonactive m odes. internal phase matching circuitry ensures that the voltage and current channels are phase matched while the hpf in the cur- rent channel eliminates dc offsets. an internal no-load threshold ensures that the ade7757 does not exhibit creep when no load is present. the ade7757 is available in a 16-lead soic narrow-body package.
rev. a e2e ade7757especifications (v dd = 5 v 5%, agnd = dgnd = 0 v, on-chip reference, rclkin = 6.2 k , 0.5% 50 ppm/ c, t min to t max = e40 c to +85 c, unless otherwise noted.) parameter value unit test conditions/comments accuracy 1, 2 measurement error 1 on channel v1 channel v2 with full-scale signal ( ) = ( = ) ( ) ( = ) ( ) = = () = = = = () = = = () ? = = ? ( ) = = ? = = () = ? + = = = = = = = = = = = () = = +
rev. a ade7757 e3e timing characteristics 1, 2 parameter a, b versions unit test conditions/comments t 1 3 244 ms f1 and f2 pulse width (logic low). t 2 see table ii sec output pulse period. see transfer function section. t 3 1/2 t 2 sec time between f1 falling edge and f2 falling edge. t 4 3, 4 173 ms cf pulse width (logic high). t 5 see table iii sec cf pulse period. see transfer function section. t 6 2 s minimum time between f1 and f2 pulses. notes 1 sample tested during initial release and after any redesign or process change that may affect this parameter. 2 see figure 1. 3 the pulse widths of f1, f2, and cf are not fixed for higher output frequencies. see frequency outputs section. 4 the cf pulse is always 35 s in the high frequency mode. see frequency outputs section and table iii. specifications subject to change without notice. (v dd = 5 v
rev. a e4e ade7757 caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ade7757 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. absolute maximum ratings 1 (t a = 25 c, unless otherwise noted.) v dd to agnd . . . . . . . . . . . . . . . . . . . . . . . . . e0.3 v to +7 v v dd to dgnd . . . . . . . . . . . . . . . . . . . . . . . . . e0.3 v to +7 v analog input voltage to agnd v1p, v1n, v2p, and v2n . . . . . . . . . . . . . . . . e6 v to +6 v reference input voltage to agnd . . . e0.3 v to v dd + 0.3 v digital input voltage to dgnd . . . . . e0.3 v to v dd + 0.3 v digital output voltage to dgnd . . . . e0.3 v to v dd + 0.3 v operating temperature range industrial (a, b versions) . . . . . . . . . . . . . e40 c to +85 c storage temperature range . . . . . . . . . . . . e65 c to +150 c junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150 c 16-lead plastic soic, power dissipation . . . . . . . . . 350 mw ja thermal impedance 2 . . . . . . . . . . . . . . . . . . . 124.9 c/w lead temperature, soldering vapor phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220 c notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 jedec 1s standard (2-layer) board data. ordering guide model package description package options ade7757arn soic narrow-body rn-16 ade7757arnrl soic narrow-body rn-16 in reel eval-ade7757eb evaluation board evaluation board ade7757arn-ref reference design reference design terminology measurement error the error associated with the energy measurement made by the ade7757 is defined by the following formula % e error energy registered by ade true energy true energy = 7757 100% phase error between channels the hpf (high-pass filter) in the current channel (channel v1) has a phase lead response. to offset this phase response and equalize the phase response between channels, a phase correc- tion network is also placed in channel v1. the phase correction network matches the phase to within 0.1 over a range of 45 hz to 65 hz, and 0.2 over a range 40 hz to 1 khz (see figures 11 and 12). power supply rejection this quantifies the ade7757 measurement error as a percent- age of reading when the power supplies are varied. for the ac psr measurement, a reading at nominal supplies (5 v) is taken. a 200 mv rms/100 hz signal is then introduced onto the supplies and a second reading is obtained under the same input signal levels. any error introduced is expressed as a percentage of reading?see the measurement error definition. for the dc psr measurement, a reading at nominal supplies (5 v) is taken. the supplies are then varied 5% and a second reading is obtained with the same input signal levels. any error introduced is again expressed as a percentage of reading. adc offset error this refers to the small dc signal (offset) associated with the analog inputs to the adcs. however, the hpf in channel v1 eliminates the offset in the circuitry. therefore, the power cal- culation is not affected by this offset. frequency output error (cf) the frequency output error of the ade7757 is defined as the difference between the measured output frequency (minus the offset) and the ideal output frequency. the difference is expressed as a percentage of the ideal frequency. the ideal frequency is obtained from the ade7757 transfer function (see the transfer function section). gain error the gain error of the ade7757 is defined as the difference between the measured output frequency (minus the offset) and the ideal output frequency. the difference is expressed as a percentage of the ideal frequency. the ideal frequency is obtained from the ade7757 transfer function (see the transfer function section). oscillator frequency tolerance the oscillator frequency tolerance of the ade7757 is defined as part-to-part frequency variation in terms of percentage at room temperature (25 c). it is measured by taking the difference between the measured oscillator frequency and the nominal frequency defined in the specifications section. oscillator frequency stability oscillator frequency stability is defined as frequency variation in terms of parts-per-million drift over the operating tem- perature range. in a metering application, the temperature range is e40 c to +85 c. oscillator frequency stability is measured by taking the difference between the measured oscillator frequency at e40 c and +85 c and the measured oscillator frequency at +25 c.
rev. a ade7757 e5e pin configuration 1 ade7757 v dd v2p v2n v1n v1p f1 f2 cf dgnd revp 2 3 4 5 16 15 14 13 12 top view (not to scale) agnd ref in/out scf rclkin s0 s1 6 7 8 11 10 9 pin function descriptions pin no. mnemonic description 1v dd power supply. this pin provides the supply voltage for the circuitry in the ade7757. the supply voltage should be maintained at 5 v ( ) ( ) ? ( ) average real power information. the logic outputs can be used to directly drive electromechanical counters and 2-phase stepper motors. see the transfer func- tion section.
rev. a e6e ade7757etypical performance characteristics current e a 0.5 0.01 0.1 1 10 100 % error e0.5 e0.4 e0.3 e0.2 e0.1 0 0.1 0.2 0.3 0.4 +85 c +25 c e40 c pf = 1 on-chip reference tpc 1. error as a % of reading over temperature with on-chip reference (pf = 1) current e a 0.01 0.1 1 10 100 % error e0.5 e0.3 e0.1 0.1 0.3 0.5 0.7 0.9 pf = 0.5 on-chip reference e40 c, pf = 0.5 +25 c, pf = 1.0 +85 c, pf = 0.5 e25 c, pf = 0.5 tpc 2. error as a % of reading over temperature with on-chip reference (pf = 0.5) current e a 0.01 0.1 1 10 100 % error e1.0 e0.8 e0.6 e0.4 e0.2 0.2 0.6 1.0 pf = 1 external reference +85 c e40 c +25 c 0 0.4 0.8 tpc 3. error as a % of reading over temperature with external reference (pf = 1) current e a 0.01 0.1 1 10 100 % error e1.0 e0.8 e0.6 e0.4 e0.2 0.2 0.6 1.0 pf = 0.5 external reference 0 0.4 0.8 +25 c, pf = 1.0 +85 c, pf = 0.5 +25 c, pf = 0.5 e40 c, pf = 0.5 tpc 4. error as a % of reading over temperature with external reference (pf = 0.5) 6.2k v2n 200 220v 150nf v2p 200 602k v1p v1n 350 40a to 40ma ref in/out 100nf 1 f 100nf 10 f v dd dgnd f1 f2 cf revp rclkin s0 s1 scf 10nf 10nf 10nf u3 ps2501-1 k7 k8 u1 ade7757 10k v dd 200 200 150nf 150nf agnd 150nf v dd figure 2. test circuit for performance curves
rev. a ade7757 e7e frequency e hz 45 % error e0.5 e0.4 e0.3 e0.2 e0.1 0.1 0.3 0.5 0 0.2 0.4 50 55 60 65 pf = e0.5 pf = +0.5 pf = +1.0 tpc 5. error as a % of reading over input frequency current e a 0.01 % error e1.0 e0.8 e0.6 e0.4 e0.2 0.2 0.6 1.0 0 0.4 0.8 0.1 1 10 100 5.25v 4.75v 5.0v pf = 1 on-chip reference tpc 6. psr with internal reference current e a 0.01 0.1 1 10 100 5.25v 5.0v 4.75v pf = 1 external reference % error e1.0 e0.8 e0.6 e0.4 e0.2 0.2 0.6 1.0 0 0.4 0.8 tpc 7. psr with external reference mv e8 0 0.5 10 15 25 35 45 20 30 40 internal reference temperature = 25 c e7 e6 e5 e4 e3 e2 e1 8 7 6 5 4 3 2 1 0 distribution characteristics number points: 100 minimum: e4.319mv maximum: 2.2828mv mean: e1.04576552mv std. dev: 1.300956604mv tpc 8. channel v1 offset distribution mv e8 0 0.5 10 15 25 35 45 20 30 40 internal reference temperature = 25 c e6 e4 e2 8 6 4 2 0 e10 e12 e14 e16 e18 e20 10 distribution characteristics number points: 100 minimum: e9.82923mv maximum: 0.472126mv mean: 4.54036589mv std. dev: 1.89694475mv tpc 9. channel v2 offset distribution % e8 0 0.5 10 15 25 35 20 30 40 e6 e4 e2 8 6 4 2 0 e10 e12 e14 e16 e18 e20 10 12 14 16 18 20 distribution characteristics number points: 100 minimum: e6.15% maximum: 9.96% mean: 0% std. dev: 2.84% external reference temperature = 25 c tpc 10. part-to-part cf distribution from mean
rev. a e8e ade7757 theory of operation the two adcs digitize the voltage signals from the current and voltage sensors. these adcs are 16-bit - with an oversampling rate of 450 khz. this analog input structure greatly simplifies sensor interfacing by providing a wide dynamic range for direct connection to the sensor and also simplifies the antialiasing filter design. a high-pass filter in the current chan- nel removes any dc component from the current signal. this eliminates any inaccuracies in the real power calculation due to offsets in the voltage or current signals. because the hpf is always enabled, the ic will operate only with ac input (see hpf and offset effects section). the real power calculation is derived from the instantaneous power signal. the instantaneous power signal is generated by a direct multiplication of the current and voltage signals. in order to extract the real power component (i.e., the dc component), the instantaneous power signal is low-pass filtered. figure 3 illustrates the instantaneous real power signal and shows how the real power information can be extracted by low-pass filtering the instantaneous power signal. this scheme correctly calculates real power for sinusoidal current and voltage waveforms at all power factors. all signal processing is carried out in the digital domain for superior stability over temperature and time. time time adc adc ch1 ch2 multiplier lpf f1 f2 digital-to- frequency cf digital-to- frequency instantaneous real power signal instantaneous power signal ?p(t) hpf figure 3. signal processing block diagram the low frequency outputs (f1, f2) of the ade7757 are gener- ated by accumulating this real power information. this low frequency inherently means a long accumulation time between output pulses. consequently, the resulting output frequency is proportional to the average real power. this average real power information is then accumulated (e.g., by a counter) to generate real energy information. conversely, due to its high output frequency and hence shorter integration time, the cf output frequency is proportional to the instantaneous real power. this is useful for system calibration, which can be done faster under steady load conditions. power factor considerations the method used to extract the real power information from the instantaneous power signal (i.e., by low-pass filtering) is still valid even when the voltage and current signals are not in phase. figure 4 displays the unity power factor condition and a dpf (displacement power factor) = 0.5, i.e., current signal lagging the voltage by 60 ( ) ? ? ? ? ? ? () v i 2 0v power current voltage power time time voltage current v i 2 cos (60 ) 0v instantaneous power signal instantaneous real power signal instantaneous power signal instantaneous real power signal 60 figure 4. dc component of instantaneous power signal conveys real power information, pf < 1
rev. a ade7757 ? nonsinusoidal voltage and current the real power calculation method also holds true for nonsinusoidal current and voltage waveforms. all voltage and current waveforms in practical applications will have some har- monic content. using the fourier transform, instantaneous voltage and current waveforms can be expressed in terms of their harmonic content. vt v 2 0 () =+ + () ho hh vht sin ? (1) where: v(t) is the instantaneous voltage. v 0 is the average value. v h is the rms value of voltage harmonic h. h is the phase angle of the voltage harmonic. it i 0 () =+ + () 2 ho hh iht sin ? (2) where: i(t) is the instantaneous current. i 0 is the dc component. i h is the rms value of current harmonic h. h is the phase angle of the current harmonic. using equations 1 and 2, the real power p can be expressed in terms of its fundamental real power ( p 1 ) and harmonic real power ( p h ). ppp h =+ 1 where pv i 111 1 111 = = cos ? ? (3) and pvi h h hh h hhh = = 1 cos ? ? (4) as can be seen from equation 4, a harmonic real power compo- nent is generated for every harmonic, provided that harmonic is present in both the voltage and current waveforms. the power factor calculation has previously been shown to be accurate in the case of a pure sinusoid. therefore, the harmonic real power must also correctly account for power factor since it is made up of a series of pure sinusoids. note that the input bandwidth of the analog inputs is 7 khz at the nominal internal oscillator frequency of 450 khz. analog inputs channel v1 (current channel) the voltage output from the current sensor is connected to the ade7757 here. channel v1 is a fully differential voltage input. v1p is the positive input with respect to v1n. the maximum peak differential signal on channel v1 should be less than 30 mv (21 mv rms for a pure sinusoidal signal) for specified operation. + 30mv ?0mv v cm v1 differential input 30mv max peak common-mode 6.25mv max + v1p v1n v1 + v cm agnd figure 5. maximum signal levels, channel v1 the diagram in figure 5 illustrates the maximum signal levels on v1p and v1n. the maximum differential voltage is 30 mv. the differential voltage signal on the inputs must be referenced to a common mode, e.g., agnd. the maximum common- mode signal is 6.25 mv, as shown in figure 5. channel v2 (voltage channel) the output of the line voltage sensor is connected to the ade7757 at this analog input. channel v2 is a fully differen- tial voltage input with a maximum peak differential signal of 165 mv. figure 6 illustrates the maximum signal levels that can be connected to the ade7757 channel v2. + 165mv ?65mv v cm v2 differential input 165mv max peak common-mode 25mv max + v2p v2n v2 + v cm agnd figure 6. maximum signal levels, channel v2 channel v2 is usually driven from a common-mode voltage, i.e., the differential voltage signal on the input is referenced to a common mode (usually agnd). the analog inputs of the ade7757 can be driven with common-mode voltages of up to 25 mv with respect to agnd. however, best results are achieved using a common mode equal to agnd.
rev. a ?0 ade7757 typical connection diagrams figure 7 shows a typical connection diagram for channel v1. a shunt is the current sensor selected for this example because of its low cost compared to other current sensors such as the ct (current transformer). this ic is ideal for low current meters. v1p v1n c f c f r f r f 30mv shunt agnd phase neutral figure 7. typical connection for channel v1 figure 8 shows a typical connection for channel v2. typically, the ade7757 is biased around the phase wire, and a resistor divider is used to provide a voltage signal that is proportional to the line voltage. adjusting the ratio of r a , r b , and r f is also a convenient way of carrying out a gain calibration on a meter. v2p v2n c f phase neutral r f 165mv c f r f r b r a * * r a >> r b + r f figure 8. typical connections for channel v2 power supply monitor the ade7757 contains an on-chip power supply monitor. the power supply (v dd ) is continuously monitored by the ade7757. if the supply is less than 4 v, the ade7757 becomes inactive. this is useful to ensure proper device operation at power-up and power-down. the power supply monitor has built in hyster- esis and filtering that provide a high degree of immunity to false triggering from noisy supplies. as can be seen from figure 9, the trigger level is nominally set at 4 v. the tolerance on this trigger level is within 5%. the power supply and decoupling for the part should be such that the ripple at v dd does not exceed 5 v 5% as specified for normal operation. v dd 5v 4v 0v time inactive active inactive internal activation figure 9. on-chip power supply monitor hpf and offset effects figure 10 illustrates the effect of offsets on the real power calcu- lation. as can be seen, offsets on channel v1 and channel v2 will contribute a dc component after multiplication. since this dc component is extracted by the lpf and used to generate the real power information, the offsets will contribute a constant error to the real power calculation. this problem is easily avoided by the built-in hpf in channel v1. by removing the offsets from at least one channel, no error component can be generated at dc by the multiplication. error terms at the line frequency ( ) are removed by the lpf and the digital-to-frequency conversion (see digital-to-frequency conversion section). the equation below shows how the power calculation is affected by the dc offsets in the current and voltage channels. vtviti vi vivi tiv t vi t os os os os os os cos cos cos cos cos ? ? () + {} () + {} = ++ () + () + () 2 2 2 dc component (including error term) is extracted by the lpf for real power calculation i os v v os i v os i os v i 2 0 frequency ?rad/s figure 10. effect of channel offset on the real power calculation
rev. a ade7757 ?1 the hpf in channel v1 has an associated phase response that is compensated for on-chip. figures 11 and 12 show the phase error between channels with the compensation network acti- vated. the ade7757 is phase compensated up to 1 khz as shown. this will ensure correct active harmonic power calcula- tion even at low power factors. frequency ?hz 0.30 phase ?degrees 0.25 0.20 0.15 0.10 0.05 0 ?.05 ?.10 0 100 200 300 400 500 600 700 800 900 1000 figure 11. phase error between channels (0 hz to 1 khz) frequency ?hz 0.30 phase ?degrees 0.25 0.20 0.15 0.10 0.05 0 ?.05 ?.10 40 45 50 55 60 65 70 figure 12. phase error between channels (40 hz to 70 hz) digital-to-frequency conversion as previously described, the digital output of the low-pass filter after multiplication contains the real power information. how ever, since this lpf is not an ideal ?rick wall?filter implementation, the output signal also contains attenuated components at the line frequency and its harmonics, i.e., cos(h t) where h = 1, 2, 3, . . . and so on. the magnitude response of the filter is given by |h f () = + | . 1 1 445 2 2 f (5) for a line frequency of 50 hz, this would give an attenuation of the 2 (100 hz) component of approximately 22 db. the dominating harmonic will be at twice the line frequency (2 ) due to the instantaneous power calculation. figure 13 shows the instantaneous real power signal at the output of the lpf that still contains a significant amount of instanta- neous power information, i.e., cos(2 t). this signal is then passed to the digital-to-frequency converter where it is integrated (accumulated) over time in order to produce an output fre quency. the accumulation of the signal will suppress or average out any non-dc components in the instantaneous real power signal. the average value of a sinusoidal signal is zero. thus, the frequency generated by the ade7757 is proportional to the average real power. figure 13 shows the digital-to-frequency conversion for steady load conditions, i.e., constant voltage and current. lpf f1 f2 digital-to- frequency cf digital-to- frequency multiplier f1 time cf time frequency frequency v i 0 frequency (rad/s) 2 cos (2 ) attenuated by lpf v i 2 lpf to extract real power (dc term) instantaneous real power signal (frequency domain) figure 13. real power-to-frequency conversion as can be seen in the diagram, the frequency output cf is seen to vary over time, even under steady load conditions. this fre- quency variation is primarily due to the cos(2 t) component in the instantaneous real power signal. the output frequency on cf can be up to 2048 times higher than the frequency on f1 and f2. this higher output frequency is generated by accumu- lating the instantaneous real power signal over a much shorter time while converting it to a frequency. this shorter accumula- tion period means less averaging of the cos(2 t) component. consequently, some of this instantaneous power signal passes through the digital-to-frequency conversion. this will not be a problem in the application. where cf is used for calibration purposes, the frequency should be averaged by the frequency counter, which will remove any ripple. if cf is being used to measure energy, for example in a microprocessor based applica- tion, the cf output should also be averaged to calculate power. because the outputs f1 and f2 operate at a much lower fre- quency, a lot more averaging of the instantaneous real power signal is carried out. the result is a greatly attenuated sinusoidal content and a virtually ripple-free frequency output.
rev. a ?2 ade7757 interfacing the ade7757 to a microcontroller for energy measurement the easiest way to interface the ade7757 to a microcontroller is to use the cf high frequency output with the output fre quency scaling set to 2048 f1, f2. this is done by setting scf = 0 and s0 = s1 = 1 (see table iii). with full-scale ac signals on the analog inputs, the output frequency on cf will be approxi- mately 2.867 khz. figure 14 illustrates one scheme that could be used to digitize the output frequency and carry out the neces- sary averaging mentioned in the previous section. cf time 10% frequency ripple average frequency ade7757 counter timer mcu cf figure 14. interfacing the ade7757 to an mcu as shown, the frequency output cf is connected to an mcu counter or port. this will count the number of pulses in a given integration time, which is determined by an mcu internal timer. the average power proportional to the average frequency is given by average frequency average power counter time == the energy consumed during an integration period is given by energy average power time counter time time counter === for the purpose of calibration, this integration time could be 10 seconds to 20 seconds in order to accumulate enough pulses to en sure correct averaging of the frequency. in normal opera- tion, the integration time could be reduced to one or two seconds, de pending, for example, on the required update rate of a dis- play. with shorter integration times on the mcu, the amount of energy in each update may still have some small amount of ripple, even under steady load conditions. however, over a minute or more the measured energy will have no ripple. power measurement considerations calculating and displaying power information will always have some associated ripple that will depend on the integration pe riod used in the mcu to determine average power and also on the load. for example, at light loads, the output frequency may be 10 hz. with an integration period of two seconds, only about 20 pulses will be counted. the possibility of missing one pulse always exists as the ade7757 output frequency is running asynchronously to the mcu timer. this would result in a one- in-twenty or 5% error in the power measurement. internal oscillator (osc) the nominal internal oscillator frequency is 450 khz when used with rclkin with a nominal value of 6.2 k ? . the frequency outputs are directly proportional to the oscillator frequency, thus rclkin must have low tolerance and low temperature drift to ensure stability and linearity of the chip. the oscillator frequency is inversely proportional to the rclkin as shown in figure 15. although the internal oscillator operates when used with rclkin values between 5.5 k ? and 20 k ? , choosing a value within the range of the nominal value, as shown in figure 15, is recommended. resistance ?k 5.8 5.9 6.1 6.3 6.7 frequency ?khz 420 430 440 450 460 480 470 490 6.0 6.2 6.4 6.5 6.6 410 400 figure 15. effect of rclkin on internal oscillator frequency (osc) transfer function frequency outputs f1 and f2 the ade7757 calculates the product of two voltage signals (on channel v1 and channel v2) and then low-pass filters this product to extract real power information. this real power information is then converted to a frequency. the frequency information is output on f1 and f2 in the form of active low pulses. the pulse rate at these outputs is relatively low, e.g., 0.175 hz maximum for ac signals with s0 = s1 = 0 (see table ii). this means that the frequency at these outputs is generated from real power information accumulated over a relatively long period of time. the result is an output frequency that is propor- tional to the average real power. the averaging of the real power signal is implicit to the digital-to-frequency conversion. the output frequency or pulse rate is related to the input voltage signals by the following equation freq vv f v rms rms ref = 515 84 1 2 14 2 . where freq =o utput frequency on f1 and f2 (hz). v 1 rms =d ifferential rms voltage signal on channel v1 (v). v 2 rms =d ifferential rms voltage signal on channel v2 (v). v ref =t he reference voltage (2.5 v 8%) (v). f 1-4 =o ne of four possible frequencies selected by using the logic inputs s0 and s1?ee table i.
rev. a ade7757 ?3 table i. f 1? frequency selection f 1? at nominal s1 s0 osc relation 1 osc (hz) 2 00 osc/2 19 0.86 01 osc/2 18 1.72 10 osc/2 17 3.44 11 osc/2 16 6.86 notes 1 f 1? is a binary fraction of the internal oscillator frequency (osc). 2 values are generated using the nominal frequency of 450 khz. example in this example, with ac voltages of 30 mv peak applied to v1 and 165 mv peak applied to v2, the expected output fre quency is calculated as follows: f 1? = osc /2 19 hz , s 0 = s 1 = 0 v 1 rms = 0.03/ 2 v v 2 rms = 0.165/ 2 v v ref = 2.5 v (nominal reference value) note: if the on-chip reference is used, actual output frequencies may vary from device to device due to reference tolerance of 8%. freq f f = == 515 85 0 03 0 165 2225 0 204 0 175 1 2 1 ... . .. table ii. maximum output frequency on f1 and f2 max frequency * s1 s0 osc relation for ac inputs (hz) 0 0 0.204 f 1 0.175 0 1 0.204 f 2 0.35 1 0 0.204 f 3 0.70 1 1 0.204 f 4 1.40 * values are generated using the nominal frequency of 450 khz frequency output cf the pulse output cf (calibration frequency) is intended for calibration purposes. the output pulse rate on cf can be up to 2048 times the pulse rate on f1 and f2. the lower the f 1? frequency selected, the higher the cf scaling (except for the high frequency mode scf = 0, s1 = s0 = 1). table iii shows how the two frequencies are related, depending on the states of the logic inputs s0, s1, and scf. due to its relatively high pulse rate, the frequency at cf logic output is proportional to the instantaneous real power. as with f1 and f2, cf is derived from the output of the low -pass filter after multiplication. how- ever, because the output frequency is high, this real power information is accumulated over a much shorter time. there- fore, less averaging is carried out in the digital-to-frequency conversion. with much less averaging of the real power signal, the cf output is much more responsive to power fluctuations (see the signal processing block in figure 3). table iii. maximum output frequency on cf scf s1 s0 cf max for ac signals (hz) * 10 0 128 f1, f2 = 22.4 000 64 f1, f2 = 11.2 101 64 f1, f2 = 22.4 001 32 f1, f2 = 11.2 110 32 f1, f2 = 22.4 010 16 f1, f2 = 11.2 111 16 f1, f2 = 22.4 01 1 2048 f1, f2 = 2.867 khz * values are generated using the nominal frequency of 450 khz. selecting a frequency for an energy meter application as shown in table i, the user can select one of four frequencies. this frequency selection determines the maximum frequency on f1 and f2. these outputs are intended for driving an energy register (electromechanical or others). since only four different output frequencies can be selected, the available frequency selection has been optimized for a meter constant of 100 imp/kwh with a maximum current of between 10 a and 120 a. table iv shows the output frequency for several maximum currents (i max ) with a line voltage of 220 v. in all cases, the m eter constant is 100 imp/kwh. table iv. f1 and f2 frequency at 100 imp/kwh i max (a) f1 and f2 (hz) 12.5 0.076 25.0 0.153 40.0 0.244 60.0 0.367 80.0 0.489 120.0 0.733 the f 1? frequencies allow complete coverage of this range of output frequencies (f1, f2). when designing an energy meter, the nominal design voltage on channel v2 (voltage) should be set to half-scale to allow for calibration of the meter constant. the current channel should also be no more than half-scale when the meter sees maximum load. this will allow overcurrent signals and signals with high crest factors to be accommodated. table v shows the output frequency on f1 and f2 when both analog inputs are half-scale. the frequencies listed in table v align very well with those listed in table iv for maximum load.
rev. a ?4 ade7757 table v. f1 and f2 frequency with half-scale ac inputs frequency on f1 and f2 s1 s0 f 1? (hz) * ch1 and ch2 half-scale ac input * 00 0.86 0.051 f 1 0.044 hz 01 1.72 0.051 f 2 0.088 hz 10 3.44 0.051 f 3 0.176 hz 11 6.86 0.051 f 4 0.352 hz * values are generated using the nominal frequency of 450 khz. when selecting a suitable f 1? frequency for a meter design, the frequency output at i max (maximum load) with a meter con- stant of 100 imp/kwh should be compared with column four of table v. the closest frequency in table v will determine the best choice of frequency (f 1? ). for example, if a meter with a maximum current of 25 a is being designed, the output fre- quency on f1 and f2 with a meter constant of 100 imp/kwh is 0.153 hz at 25 a and 220 v (from table iv). looking at table v, the closest frequency to 0.153 hz in column four is 0.176 hz. therefore, f3 (3.44 hz?ee table i) is selected for this design. frequency outputs figure 1 shows a timing diagram for the various frequency out- puts. the outputs f1 and f2 are the low frequency outputs that can be used to directly drive a stepper motor or electromechanical impulse counter. the f1 and f2 outputs provide two alter- nating low frequency pulses. the f1 and f2 pulse widths (t 1 ) are set such that if they fall below 1062 ms (0.942 hz) they are set to half of their period. the maximum output frequencies for f1 and f2 are shown in table ii. the high frequency cf output is intended to be used for com- munications and calibration purposes. cf produces a 173 ms wide active high pulse (t 4 ) at a frequency proportional to active power. the cf output frequencies are given in table iii. as in the case of f1 and f2, if the period of cf (t 5 ) falls below 346 ms, the cf pulse width is set to half the period. for example, if the cf frequency is 20 hz, the cf pulse width is 25 ms. note: when the high frequency mode is selected (i.e., scf = 0, s1 = s0 = 1), the cf pulse width is fixed at 35 s. therefore, t 4 will always be 35 s, regardless of output frequency on cf. no load threshold the ade7757 also includes a no-load threshold and start-up current feature that will eliminate any creep effects in the m eter. the ade7757 is designed to issue a minimum output fre quency. any load generating a frequency lower than this minimum fre- quency will not cause a pulse to be issued on f1, f2, or cf. the minimum output frequency is given as 0.0014% for each of the f 1? frequency selections (see table i). for example, for an energy meter with a meter constant of 100 imp/kwh on f1, f2 using f 3 (3.44 hz), the minimum output frequency at f1 or f2 would be 0.0014% of 3.44 hz or 4.81 10 ? hz. this would be 3.08 10 ? hz at cf (64 f1 hz) when scf = s0 = 1, s1 = 0. in this example, the no-load threshold would be equivalent to 1.7 w of load or a start-up current of 8 ma at 220 v. compare this value to the iec 1036 specification which states that the meter must start up with a load equal to or less than 0.4% ib. for a 5 a (ib) meter, 0.4% of ib is equivalent to 20 ma. negative power information the ade7757 detects when the current and voltage channels have a phase shift greater than 90 . this mechanism can detect wrong connection of the meter or generation of negative power. the revp pin output will go active high when negative power is detected and active low if positive power is detected. the revp pin output changes state as a pulse is issued on cf. the revp pin is not functional in the current version and will only work in the a version (ade7757a).
rev. a ade7757 ?5 outline dimensions 16-lead standard small outline package [soic] narrow body (rn-16) dimensions shown in millimeters and (inches) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-012ac 16 9 8 1 4.00 (0.1575) 3.80 (0.1496) 10.00 (0.3937) 9.80 (0.3858) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2283) seating plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 8 0 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) coplanarity 0.10 45 0.25 (0.0098) 0.17 (0.0067)
rev. a c02898??0/03(a) ?6 ade7757 revision history location page 10/03?ata sheet changed from rev. 0 to rev. a. changes to features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 changes to general description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 changes to ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 change to typical connection diagrams section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 updated outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

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